Array type noise reduction filter

ABSTRACT

Disclosed herein is an array type noise reduction filter. The array type noise reduction filter has a plurality of noise reduction filters horizontally arranged within a single chip. A plurality of noise reduction filters each have an inductance portion, a ground portion, and a capacitance portion. The inductance portion is comprised of first and second coils approximately vertically connected in the chip. The ground portion is arranged over or under the inductance portion. The capacitance portion is arranged over or under the ground portion. A second coil of any inductance portion is constructed to be wound in a direction opposite to a second coil of another adjacent inductance portion.

BACKGROUND OF THE INVENTION

[0001] 1. Field of the Invention

[0002] The present invention relates generally to array type noisereduction filters, and more particularly to an array type noisereduction filter, in which inductance portions are each formed of twocoil portions, and winding directions of the coil portions are set to bedifferent so as to offset mutual interference, thus minimizing thegeneration of electromagnetic interference.

[0003] 2. Description of the Prior Art

[0004] Generally, when electronic devices are operated, electromagneticwave noises such as various types of power noises or clock pulse sourcenoises exist within the devices. Especially, in mobile communicationterminals, as power frequency becomes higher, great electromagnetic wavenoise is generated.

[0005] Such electromagnetic wave noises are mutually propagated betweencircuits along circuit power lines or signal lines within electronicdevices, thus causing incorrect operation of each device. Further, powernoise or clock pulse source noise generated within an electronic deviceset is propagated to another electronic device set along a power supplyline of the device set, thus causing interference with a normaloperation of another electronic device set. On the other hand, acorresponding electronic device set can interfere with its normaloperation due to noise propagated from another device. The interferencephenomenon due to such electromagnetic wave noises is so calledElectro-Magnetic Interference (EMI).

[0006] Therefore, for the purpose of performing normal operation ofelectronic devices, methods for reducing the electromagnetic wave noisesmust be considered in order to prevent this EMI when the devices aredesigned. Generally, a method for inserting a noise reduction filterbetween each circuit and each circuit power source of the electronicdevices, or between each circuit and each clock pulse source of theelectronic devices is used as a method for reducing the electromagneticwave noises.

[0007] Recently, an array type noise reduction filter has beenpopularized as a commonly used noise reduction filter. The array typenoise reduction filter is constructed in an array type such that asingle chip has a plurality of noise reduction filters within it.

[0008]FIG. 1a is a schematic sectional view showing a conventional arraytype noise reduction filter 10. Referring to FIG. 1a, the array typenoise reduction filter 10 comprises two noise reduction filters 10 a and10 b. The noise reduction filters 10 a and 10 b each have first andsecond ground electrode layers 12 and 13, capacitance portions 14 a and15 a or 14 b and 15 b, and an inductance portion 17 a or 17 b. The firstand second ground electrode layers 12 and 13 are respectively arrangedat the upper and lower portions of a chip 11. The capacitance portions14 a and 15 a or 14 b and 15 b are formed inside each of the first andsecond ground electrode layers 12 and 13. The inductance portion 17 a or17 b is formed in a coil pattern. The first and second ground electrodelayers 12 and 13 function as common electrodes shared between the noisereduction filters 10 a and 10 b. Further, input and output ports (notshown) of each noise reduction filter are formed on the front and backsurfaces of the chip 11. The input ports formed on the front surface ofthe chip 11 are each connected to one end of each of the inductanceportions 17 a and 17 b, and the capacitance portions 14 a and 15 a,while the output ports formed on the back surface of the chip 11 areeach connected to the other end of each of the inductance portions 17 aand 17 b, and the capacitance portions 14 b and 15 b.

[0009] In the array structure of the array type noise reduction filter10, the first and second inductance portions 17 a and 17 b aresymmetrically arranged adjacently to each other at the center portion ofthe chip 11, thus causing inductance coupling due to mutual inductance.In other words, crosstalk which is mutual electromagnetic interferencecan occur between the noise reduction filters 10 a and 10 b.Consequently, the array type noise reduction filter is problematic inthat undesirable influence is generated between the filters 10 a and 10b due to the mutual interference, thus causing the incorrect operationof each noise reduction filter.

[0010]FIG. 1b is a graphic view showing the electromagnetic interferencecharacteristics of a conventional array type noise reduction filter.Referring to FIG. 1b, a full line represents characteristics of eachnoise reduction filter in the array type noise reduction filter, and adotted line represents the electromagnetic interference characteristicsgenerated between the noise reduction filters. As shown with the dottedline, in the conventional array type noise reduction filter, crosstalkoccurs largely between the noise reduction filters. This is due to themutual inductance generated between the filters arranged within a singlechip, as described above. Therefore, such mutual inductance causeselectromagnetic interference between the filters, thus deteriorating thefilter characteristics of the array type noise reduction filter.

[0011] As described above, in this noise reduction filter technicalfield, a new array type noise reduction filter has been required foreffectively preventing crosstalk from occurring due to the mutualinductance between the inductance portions of respective noise reductionfilters.

SUMMARY OF THE INVENTION

[0012] Accordingly, the present invention has been made keeping in mindthe above problems occurring in the prior art, and an object of thepresent invention is to provide an array type noise reduction filter, inwhich inductance portions are each formed as a plurality of coils, andwinding directions of some of the coils are set opposite each other, soas to offset mutual interference generated between the coils of thenoise reduction filters due to mutual inductance, thus minimizingelectromagnetic interference.

[0013] In accordance with one aspect of the present invention, the aboveand other objects can be accomplished by the provision of an array typenoise reduction filter, comprising a plurality of noise reductionfilters horizontally arranged within a single chip, each comprising, aninductance portion comprised of first and second coils approximatelyvertically connected in the chip, a ground portion arranged over orunder the inductance portion, and a capacitance portion arranged over orunder the ground portion; wherein a second coil of any inductanceportion is constructed to be wound in a direction opposite to a secondcoil of another adjacent inductance portion.

[0014] According to a preferred embodiment of this invention, inductancevalues of the first and second coils are set to be approximately thesame value, such that mutual inductance generated by adjacent coilswound in opposite directions can be effectively offset.

[0015] According to another embodiment of this invention, the groundportion can be comprised of a first ground portion arranged over theinductance portion and a second ground portion under the inductanceportion. In this case, preferably the capacitance portion is comprisedof a first capacitance portion arranged under the first ground portionand a second capacitance portion arranged over the second groundportion.

[0016] According to still another preferred embodiment of thisinvention, the ground portion is arranged at one position of upper andlower portions of the chip, and the capacitance portion is comprised ofa first capacitance portion arranged over the ground portion and asecond capacitance portion arranged under the ground portion to beopposite the first capacitance portion, such that each noise reductionfilter is formed in the shape of pi (π).

[0017] On the other hand, the ground portion is formed of a single layershared between a plurality of noise reduction filters, such that it isprovided as a common ground electrode for a plurality of noise reductionfilters.

[0018] According to the most preferred embodiment of this invention,each noise reduction filter further comprises an isolation means formedbetween the first and second coils to isolate the first and second coilsfrom undesirable electromagnetic influence between the first and secondcoils. Preferably, such an isolation means can be a conductor layerhaving a via hole for connecting the first coil to the second coil.

[0019] In accordance with another aspect of the present invention, thereis provided an array type noise reduction filter having a single chipshape, comprising a plurality of inductance portions each comprised offirst and second coils approximately vertically connected within a chip,and arranged horizontally to each other; a ground portion arranged at atleast one position over or under the inductance portions according tothe arrangement direction of a plurality of inductance portions; and aplurality of capacitance portions each vertically arranged over or underthe ground portion in approximately the same direction as that of eachof a plurality of inductance portions, wherein the inductance portionseach include isolation means for blocking electromagnetic influencebetween first and second coils of each of the inductance portions, and asecond coil of any inductance portion is constructed to be wound in adirection opposite to a second coil of another adjacent inductanceportion.

BRIEF DESCRIPTION OF THE DRAWINGS

[0020] The above and other objects, features and other advantages of thepresent invention will be more clearly understood from the followingdetailed description taken in conjunction with the accompanyingdrawings, in which:

[0021]FIG. 1a is a schematic sectional view showing a conventional arraytype noise reduction filter;

[0022]FIG. 1b is a graphic view showing the electromagnetic interferencecharacteristics of the conventional array type noise reduction filter;

[0023]FIG. 2 is a schematic perspective view showing an array type noisereduction filter having two noise reduction filters according to apreferred embodiment of this invention;

[0024]FIG. 3a is a circuit diagram of an array type noise reductionfilter having four noise reduction filters according to a preferredembodiment of this invention;

[0025]FIGS. 3b and 3 c are graphic views showing the characteristics ofeach of the noise reduction filters of FIG. 3a; and

[0026]FIG. 4 is a schematic sectional view showing another array typenoise reduction filter having four noise reduction filters according toanother preferred embodiment of this invention.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0027]FIG. 2 is a schematic perspective view showing an array type noisereduction filter 20 according to a preferred embodiment of thisinvention. Referring to FIG. 2, the array type noise reduction filter 20comprises two noise reduction filters 20 a and 20 b within a single chip21. The noise reduction filters 20 a and 20 b are each comprised offirst and second ground electrodes 22 and 23, a first capacitanceportion 24 a or 24 b, a second capacitance portion 25 a or 25 b, and aninductance portion. One end of the first capacitance portion 24 a or 24b is connected to the first ground portion 22, and the other end thereofis connected to input ports (not shown). Further, one end of the secondcapacitance portion 25 a or 25 b is connected to the second groundportion 23, and the other end thereof is connected to output ports (notshown). One end of the inductance portion is connected to the inputports and the other end thereof is connected to the output ports.Especially, in the present invention, the inductance portion iscomprised of a first coil 27 a′ or 27 b′ and a second coil 27 a″ or 27b″. Further, a conductor layer 29 a or 29 b is provided as anelectromagnetic isolation means between the first coil 27 a′ or 27 b′and the second coil 27 a″ or 27 b″.

[0028] As shown in FIG. 2, each inductance portion is formed of firstand second coils 27 a′ and 27 a″, or 27 b′ and 27 b″ verticallyconnected. The first coil 27 a′ of one inductance portion is formed inthe same winding direction as that of the first coil 27 b′ of the otherinductance portion. However, the second coil 27 a″ is formed in awinding direction opposite to that of the second coil 27 b″ of the otherinductance portion. Therefore, mutual inductance having a polarityopposite to the mutual inductance induced between the first coils 27 a′and 27 b′ is induced between the second coils 27 a″ and 27 b″. In such astructure, mutual inductances having opposite polarities are generatedbetween the first and second coils, such that the mutual inductances canoffset each other. Here, it is preferable to arrange each of first andsecond coils of one inductance portion on approximately the same planeas each of the first and second coils of the other inductance portion.Further, it is preferable to set the first and second coils to have thesame inductance value La when the same voltage is applied. Thisperfectly offsets mutual inductance M induced between the first coilsand mutual inductance −M induced between the second coils, thus entirelyminimizing electromagnetic interference.

[0029] However, the present invention is characterized in thatelectromagnetic interference is reduced through an offset operationbetween mutual inductances having opposite polarities by forming theinductance portions as two coils and adjusting each direction of thecoils. Therefore, even if each of the first and second coils of oneinductance portion is not arranged on the same plane as that of theother inductance portion, or the first and second coils do not have thesame inductance value, it probably belongs to the range of the presentinvention that the direction of any one of the first and second coils isset differently from the other to minimize electromagnetic interference.Further, in the preferred embodiment of this invention, the first andsecond ground portions 22 and 23 are each formed as a common electrodefor two noise reduction filters. However, the ground portions 22 and 23can each be divided into two ground electrodes for respective noisereduction filters.

[0030] Further, in the preferred embodiment of this invention, conductorlayers as isolation means for isolating the first and second coils fromelectromagnetic influence are formed. In other words, the conductorlayers serve to prevent inductance values due to mutual influencebetween the first and second coils from varying. Preferably,plate-shaped conductor layers each having a via hole for connecting thefirst and second coils to each other can be used as conduction layersfor blocking the mutual electromagnetic influence while connecting thefirst coil to the second coil. The isolation means such as theconduction layers are described below in detail.

[0031]FIG. 3a is a circuit diagram of an array type noise reductionfilter having four noise reduction filters according to a preferredembodiment of this invention. In FIG. 3a, capacitance portions andground portions are omitted so as to conveniently describe functions ofthe inductance portions of the filters and the conductor layers includedin the inductance portions.

[0032] Referring to FIG. 3a, inductance portions of four noise reductionfilters 30 a, 30 b, 30 c and 30 d are each formed to be separated intofirst and second coils (inductance La of FIG. 3a). In the case thatinductance portions are each formed to be separated into two coils justas the inductance portions adapted to the present invention, it isdifficult to exactly adjust total inductance value of the two coils. Inother words, provided that the inductance value of each of the first andsecond coils is La, if two coils are formed in the same windingdirection, the total inductance value of the two coils becomes largerthan 2La, while if two coils are formed in opposite winding directions,its total inductance value becomes smaller than 2La. Thereby, it isdifficult to previously set the total inductance value as the same valuerequired by the inductance portions of the four noise reduction filters.Consequently, a problem in that it is difficult to design the noisereduction filters by exactly predicting the characteristics of each ofthe noise reduction filters is caused.

[0033] Therefore, the conductor layer 29 for preventing the mutualelectromagnetic influence between two coils is formed between the firstand second coils, such that the variation of the total inductance valuedue to the interaction of the two coils can be prevented. As a result,each inductance portion can be embodied to have the same inductancevalue. Further, if inductance portions are each required to employanother desired inductance value, the total inductance value can beeasily adjusted by selecting each inductance value of the first andsecond coils.

[0034]FIGS. 3b and 3 c are graphic views showing the characteristics ofeach of the noise reduction filters. FIG. 3b shows the characteristicsof the first and third noise reduction filters, and FIG. 3c shows thecharacteristics of the second and fourth noise reduction filters. In thefirst and third noise reduction filters, the second coil of eachinductance portion has the same winding direction as that of the firstcoil. In the second and fourth noise reduction filters, the second coilof each inductance portion has a winding direction opposite to that ofthe first coil.

[0035] In this case, in the first and third noise reduction filters,typically the total inductance value of the first and second coils ofeach inductance portion may be larger than the sum of the inductancevalues of the first and second coils, while in the second and fourthnoise reduction filters, the total inductance value of the first andsecond coils of each inductance portion may be smaller than the sum ofthe inductance values of the first and second coils. However, in thepreferred embodiment of this invention, the conductor layer for blockingthe electromagnetic influence between the first and second coils isformed, such that each total inductance value for all inductanceportions has almost the same value as the sum of the inductance valuesof the two coils. Therefore, as shown in FIGS. 3b and 3 c, the noisereduction filters, in which the winding direction of the second coil isopposite to the first coil, have approximately the same low passcharacteristics.

[0036]FIG. 4 is a schematic sectional view showing another array typenoise reduction filter 40 having four noise reduction filters 40 a, 40b, 40 c and 40 d according to another preferred embodiment of thisinvention. Referring to FIG. 4, in the array type noise reduction filter40, a ground electrode 42 and first and second capacitance portions 44and 45 can be concentrically formed at the lower portion of a chip 41.Further, the ground electrode 42 can be formed as a common electrodeshared between the four noise reduction filters 40 a, 40 b, 40 c and 40d. As described above, the ground electrode 42 is formed as oneelectrode, thus saving one ground electrode in comparison with theembodiment using two ground electrodes as shown in FIG. 2. Accordingly,the embodiment of FIG. 4 is advantageous in that it can simplify themanufacturing process of the array type noise reduction filter, inaddition to reducing its manufacturing costs. The preferred embodimentof this invention can be similarly adapted such that the groundelectrode 42 and the capacitance portions 44 and 45 are concentricallyformed at the upper portion of the chip 41.

[0037] As shown in FIG. 4, pi-shaped noise reduction filters in whichthe capacitance portions 44 and 45 are respectively arranged over andunder the ground electrode 42 can be modified by omitting one of thecapacitance portions 44 and 45. In such a structure, preferably thecapacitance portion is connected to one of the input and output ports ofeach noise reduction filter so as to realize the same characteristics.

[0038] In other words, it is preferable to embody the noise reductionfilters each employing one capacitance portion in the manufacturingprocess, because the input ports or output ports connected to thecapacitance portion are arranged to the same position when eachcapacitance portion is arranged at only one position over or under theground electrode.

[0039] As described above, the present invention provides an array typenoise reduction filter, which inductance portions of noise reductionfilters are each formed of first and second coils, and the windingdirections of some of the coils are set opposite each other, such thatmutual interference generated between the coils of the noise reductionfilters due to mutual inductance can be offset. Further, the presentinvention is advantageous in that mutual electromagnetic interferencecan be minimized by forming conductor layers between first and secondcoils to block mutual influence between the coils, and required filtercharacteristics can be designed by realizing exact inductance values.

[0040] Although the preferred embodiments of the present invention havebeen disclosed for illustrative purposes, those skilled in the art willappreciate that various modifications, additions and substitutions arepossible, without departing from the scope and spirit of the inventionas disclosed in the accompanying claims.

What is claimed is:
 1. An array type noise reduction filter, comprising:a plurality of noise reduction filters horizontally arranged within asingle chip, each comprising, an inductance portion comprised of firstand second coils approximately vertically connected in the chip, aground portion arranged over or under the inductance portion, and acapacitance portion arranged over or under the ground portion; wherein asecond coil of any inductance portion is constructed to be wound in adirection opposite to a second coil of another adjacent inductanceportion.
 2. The array type noise reduction filter according to claim 1,wherein the first and second coils have approximately the sameinductance value.
 3. The array type noise reduction filter according toclaim 1, wherein the ground portion is comprised of a first groundportion arranged over the inductance portion and a second ground portionarranged under the inductance portion.
 4. The array type noise reductionfilter according to claim 3, wherein the capacitance portion iscomprised of a first capacitance portion arranged under the first groundportion and a second capacitance portion arranged over the second theground portion.
 5. The array type noise reduction filter according toclaim 1, wherein the ground portion is arranged at only one position ofthe upper and lower portions of the chip, and the capacitance portion iscomprised of a first capacitance portion arranged over the groundportion and a second capacitance portion arranged under the groundportion.
 6. The array type noise reduction filter according to claim 1,wherein the ground portion is a common electrode formed as a singlelayer to be shared between a plurality of noise reduction filters. 7.The array type noise reduction filter according to claim 1, wherein aplurality of noise reduction filters each further comprise isolationmeans formed between the first and second coils to block electromagneticinfluence between the first and second coils.
 8. The array type noisereduction filter according to claim 7, wherein the isolation means isformed of a conductor layer having a via hole for connecting the firstand second coils to each other.
 9. An array type noise reduction filterhaving a single chip shape, comprising: a plurality of inductanceportions each comprised of first and second coils approximatelyvertically connected within a chip, and arranged horizontally to eachother; a ground portion arranged at at least one position over or underthe inductance portions according to the arrangement direction of aplurality of inductance portions; and a plurality of capacitanceportions each vertically arranged over or under the ground portion inapproximately the same direction as that of each of a plurality ofinductance portions, wherein the inductance portions each includeisolation means for blocking electromagnetic influence between first andsecond coils of each of the inductance portions, and a second coil ofany inductance portion is constructed to be wound in a directionopposite to a second coil of another adjacent inductance portion.